What is meant by multiplexed address data bus?

Multiplexing of the data and address buses is done to reduce the pin count on the microprocessor chip. The address information is emitted at the beginning of a memory cycle, and external logic is expected to latch that address. Then the bus becomes the data bus and the required data is transferred to or from memory using the latched address.

In the 8085, this saves 8 pins at the cost of 1 pin, ALE. In the 8086/8088, this saves 16 pins at the cost of 1 pin, ALE. In some architectures or modes, there is no ALE, but the external logic is still required to know when to latch the address based on some other criteria.

As an example of that, in the original Intel 4004, the microprocessor's bus was 4 bits, while the address bus was 12 bits. There were 8 clock cycles. In the first three, external logic was expected to latch the three 4 bit parts of the 12 bit address. Similarly, in the next two, the resultant opcode, which as 8 bits, was multiplexed by the external logic into two 4 bit parts. (The 4004 was only a 16 pin chip, but it packed a lot of complexity in its day, being the world's first microprocessor.)