What is propagation delay in flip flops?

Propagation Delay

In digital logic, every gate has got some finite amount of delay because of which the

change in the output is not instantaneous to the change in the input.

In simple terms, the times it takes for an input to appear at the output is called the

propagation delay.

In Figure 6, tPHL, describes the time it takes for an input to cause the output to change

from logic-level-high to logic-level-low.

Similarly, tPLH, refers to the delay associated when an input change causes the output to

change from logic-level-low to logic-level-high.

The overall delay is average of these two delays.