Pipelining takes advantage of the fact that each individual instruction is executed in multiple steps by different parts of the CPU.
For an example let's looks at an imaginary CPU which has three stages of executing an instruction: reading the instruction from cache, executing the instruction, and writing back data.
Now on the first CPU cycle, we can read in a single instruction from the cache. On the second cycle, that first instruction can now be executing while a second instruction is read in. So rather than taking 3 CPU cycles to fully execute each instruction before moving on to the next, you can work on 3 instructions at the same time.
Concurrency may refer to multiple things in computer architecture. Having multiple CPUs on a single motherboard, or even multiple CPUs on the same chip (multi-core) can be considered one type of concurrency, where each CPU executes instructions without needing to know much about what the other CPUs are doing.
However, we can go on an even lower level and look at concurrency within a single CPU, as well. It is not uncommon for processors to have multiple copies of certain components on them. The Arithmetic Logic Unit (ALU) is a common place to see this, since this is home to the notoriously slow floating-point math components.
This contributor can remember reading about certain processors in which integer addition and multiplication took only a single CPU cycle to execute, but something like floating-point division took closer to 40 cycles. For modern machines which may need to perform many floating-point calculations, having multiple floating-point units within the ALU (or even multiple ALUs) would allow for the concurrent execution of multiple calculations.
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