How are the code segment address generated in 8086 microprocessor?

In the 8086 microprocessor, code segment addresses are generated using a segment:offset addressing scheme. The code segment (CS) register holds the starting address of the code segment, while the instruction pointer (IP) register holds the offset of the next instruction to be executed within that segment. The effective address of an instruction is calculated by adding the value in the CS register (shifted left by 4 bits) to the value in the IP register, allowing for a total addressable space of 1 MB. This segmentation allows for efficient memory management and organization of code.