How can avalanche breakdown be avoided in FET?

Breakdown depends on the electric field value in FETS (as in diodes and such, where you can find a junction).

Theoretically, you need to

- dope less the junction region of your device (like p-i-n diodes, the i (intrinsic) region is not doped in order to reduce E field peak, which occurs near the center of the device).

- raise the length of your device

Both of these two solutions will have the drawback of increasing your ON resistance.

At circuit design level, you can protect your devices with clamp diodes or something similar.